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TCT-2 PCM - TDM Principles PCM Principles Chapter 1 Types of signals Information can be in analog form or it can be in digital form. The telephone instrument generates the information (i.e. voice) in the form of analog. The computer generates the information (i.e. data) in the digital form When this information (either analog or digital) is transmitted over the medium, then this is called signal. Thus the signal can be either Analog or Digital. Analog Signal Analog is a continuous electrical signal that varies continuously in amplitude and frequency Analog signal can have infinite number of amplitude values or states within a specified range In analogue system, it is difficult to remove noise and wave distortions during transmissions. For this reason analog signal cannot perform high quality data transmission Analog Signal Digital signal is an electrical signal which posses two distinct states, On/off or positive / negative. Widely used form of digital signals are binary signals, in which one amplitude condition represents a binary digit 1, and another amplitude condition represents a binary digit 0. Noise and distortions have little effect, making high quality data transmission possible Digital Signal Digital Signal Digital Signal Multiplexing Multiplex is a technique of transmission of information from more than one source to more than one destination on the same medium or facility. Advantages: Many signals can share an existing channel and make better use of the channel capacity Allow several different signal to be clustered into a single group, for easy handling and maintenance Dividing a link into channels Types of multiplexing Frequency-division multiplexing (FDM) FDM is an analog multiplexing technique that combines analog signals in frequency domain. Frequency domain In frequency domain a given bandwidth of frequencies is divided into a number of frequency slots having a bandwidth of 4 KHz. This is called Frequency Division Multiplexing FDM Multiplexing Process FDM De-multiplexing Process Example of FDM Technique TDM is a digital multiplexing technique that combines digital signals in time domain. In time domain a given time period is divided into a number of time intervals of equal duration called time slots TDM is compatible with digital signals and makes good use of digital circuitry for these signal Simplistically, TDM physically switches from originator to originator to share the time available, and the receiving unit does the same in synchronism. Time-division multiplexing (TDM) Source 3 Multiplexer Source 1 Source 2 2 3 1 1 2 3 1 2 3 1 2 3 1 2 3 1 2 3 Multiplexer TIME DOMAIN TDM Process WDM is an analog multiplexing technique that combines signals in optical domain. In Optical domain a given band of wavelengths is divided among a number of information signals with suitable spacing. Each information signal is assigned a specific wavelength This is called Wavelength Division Multiplexing Wave length Division Multiplexing (WDM) Wavelength-division multiplexing (WDM) Prisms in WDM Basic Principle of (WDM) TX-A ITU Ch.1 TX-A ITU Ch.2 TX-A ITU Ch.3 TX-A ITU Ch.4 RX-A ITU Ch.1 RX-A ITU Ch.2 RX-A ITU Ch.3 RX-A ITU Ch.4 4 CH WD M MUX 4 CH WDM MUX Optic fiber EDFA 25 db gain (λ1). (λ2 ) Data in (λ3 ) (λ4 ) (λ1). (λ2 ) Data Out (λ3 ) (λ4 ) Interleaving The process of taking a group of bits or bytes from each input line for multiplexing is called interleaving. We interleave bits or bytes from each input onto one output. Two types of interleaving methods are adopted Bit Interleaving Byte Interleaving Bit Interleaving is used in PDH systems & Byte interleaving is used in SDH systems. Interleaving Need of digital transmission A digital signal is superior to an analog signal because it is more robust to noise and can easily be recovered, corrected and amplified For this reason, the tendency today is to change an analog signal to digital data The most common technique to change an analog signal into data signal (digitization) is called Pulse Code Modulation . PCM (Pulse Code Modulation) PCM is the most frequently used analogue-to-digital conversion technique. Developed by Mr. A .H . Reaves of U.S.A It is defined in the ITU-T G.711 specification. The main parts of a conversion system are The encoder (the analogue-to-digital converter) The decoder (the digital-to-analogue converter) The combined encoder/decoder is known as a codec The PCM generation involves the following steps Filtering Sampling Quantization Encoding TDM (Time Division Multiplexing) Line coding PCM Generation PCM Generation Filtering is the first step in the PCM process Low pass filters are used to limit the incoming voice signal (information) to the frequency band of „0‟ to „4000‟Hz. This band is called as voice band (0 - 4 KHz) This filtering is to avoid aliasing Filtering Sampling Sampling is the second step in the PCM process It is a process of periodically slicing ( sampling) the continually changing incoming analog signal to a serious of constant amplitude pulses. After sampling the generated signal is called PAM (pulse amplitude modulated signal) Sampling will easier the process of Converting to digital (PCM) signal. T1 T2 T3 time T4 T5 T6 T7 Incoming audio (analog) Signal Sampled PAM (analog) Output Signal T1 T2 T3 time T4 T5 T6 T7 Sampling Representation Sampling Signal Information Theory shows that full restoration of a signal at the reception end can be obtained by transmitting the value of the signal sampled at regular intervals. St St St Signal Sampling Pulses Sampled Signal Recovered Signal In the PCM process the sampling (slicing) for incoming audio (analog) signal is done to convert into digital signal. The rate at which the sampling to be done,for recovery of the original signal is defined by the Nyquist theorem. As per the Nyquist theorem “If a band limited signal is sampled at regular intervals of time and at a rate equal to or more than twice the highest signal frequency in the band, then the sample contains all the information of the original signal” Sampling Rate As per the Nyquist theorem the sampling frequency is two times (twice) the incoming audio signal band. fs 2fh, Where, fs is the sampling frequency; fh is the highest frequency in the audio band. The highest frequency in the incoming analog (audio band) is 4KHz, then the sampling frequency is twice of this which is equal to 8KHz or 8000 samples per second. The time period of sampling or “sampling rate” is denoted with Ts Ts = 1/sampling frequency = 1/8000 = 125 µ seconds Sampling Rate contd………. Quantization is the third step in the PCM process With the sampling the incoming analog signal is converted into PAM signal. This PAM signal is still an analog signal and it will be converted into digital form by the process called quantization. Quantization is a process of breaking down the incoming discretelevel of sample signal into quantified finite number of amplitude values or steps. Quantization Quantization contd……. A sampled signal (PAM) exists only at discrete times. This sampled signal‟s (PAM) amplitude is drawn from a continuous range of amplitudes of an analogue signal. The discrete value of a sample (PAM) is measured by comparing it with a scale, having a finite number of intervals. These intervals are called the 'quantizing intervals' and identifying the interval in which the sample lies. Quantization levels In the above signal we have five samples “a, b , c, d, e “ To quantize these five samples, the total amplitude may be divided into eight ranges or intervals. Sample „a‟ lies in the range 5, the quantizing process will assign a binary code corresponding to 5, i.e., 101. Similarly, codes are assigned for other samples also. Here the quantizing intervals are of the same size, hence, it is called Linear Quantization. Quantizing has to be done for both +ve and –ve swings. For example, a 0.1 V signal can be divided into 10 mV ranges like 0 - 10 mV, 10 - 20 mV, 20 - 30 mV, 30 - 40 mV and so on. The interval 0 - 10 mV may be designated as level 0, 10 - 20 mV as level 1, 20 - 30 mV as level 2 etc. Quantization levels contd……. If a sample has an amplitude, say 23 mV or 28 mV, it will be assigned the level 2, in either case. This is represented in binary code as 1010. When these are decoded at the receiving end, the decoder will convert them into analogue signals of amplitude 25mV each. Thus, the process of quantization leads to an approximation of the input signal with some deviations in amplitude. These deviations, between the amplitudes of samples, of actual value at the “tx” end and the reconstructed value at “rx” end gives rise to quantization error. Quantization levels contd……. Analogue Signal amplitude Range Quantizing Level Binary Code Decoded O/P Maximum Error 0 – 10 mV 0 1000 5mV 5mV 10 – 20 mV 1 1001 15 mV 5mV 20 – 30 mV 2 1010 25 mV 5mV 30 – 40 mV 3 1011 35 mV 5mV 40 – 50 mV 4 1100 45 mV 5mV In quantization, the lower value of each interval is assigned to a sample falling in that particular interval. At the receiving end, the mid value of the interval is assigned, while decoding. Quantization Error Quantization error contd……. One way to reduce quantization error is to increase the amount of quantization intervals. The difference between the input signal amplitude height and the quantization interval decreases as the quantization intervals are increased (increases in the intervals decrease the quantization error). However, the amount of code words or bandwidth also need to be increased in proportion to the increase in quantization intervals. There are two types of quantization methods are adopted. Linear quantization & Non-liner quantization In linear quantization, equal step size results in equal error for all amplitudes. Thus, the signal to noise ratio for weaker signals will be poorer in comparison with signal to noise ratio for stronger signals. To reduce this error, it is, therefore, it is necessary to increase the number of steps in the given amplitude range. This would however, increase the transmission bandwidth because bandwidth is B = fh log N Where “N” is the number of quantum steps and “fh” is the highest signal frequency. Linear-quantization As per the speech statistics, the probability of occurrence of small amplitude is much greater than that a large one. It is appropriate to provide more quantum levels in the small amplitude region and only a fewer quantum levels in the region of higher amplitudes. In this case, no increase in transmission bandwidth will be required, provided that the total number of specified levels remains unchanged. This will also bring about uniformity in signal to noise ratio at all levels of input signal. This type of quantization is called Non-linear quantization Non- linear quantization In practice, non linear quantization is achieved using segmented quantization. There are equal number of segments for both positive and negative excursions. In order to specify the location of a sample value it is necessary to know three things. 1. Sign of the sample , 1 bit=positive or negative 2. Segment number, 3 bits=8 segments 3. Quantum level within the segment, 4 bits=16 levels Non-linear-quantization Contd….. As seen from Fig. the first two segments in either polarity are collinear, i.e., the slope is the same and hence, they may be considered as one segment. Thus, the total number of segments appears to be 13 Non-linear-quantization Contd….. The non linearity introduced at the transmitting end by the non-linear quantizing can be neutralized at the receiving end by a reverse procedure. As the non linearity, before the transmission, is achieved by 'compressing' the signal, it can be neutralized by 'expanding' the received signal. Hence, the procedure is called “companding” in short. Companding There are two types of companding schemes are used in PCM -Law Companding (also called log-PCM) This is used in North America and Japan. It uses a logarithmic compression curve which is ideal in the sense that quantization intervals and hence quantization noise is directly proportional to signal level A- Law Companding This is the ITU-T standard. It is used in Europe and most of the rest of the world. It is very similar to the -Law coding. It is represented by straight line segments to facilitate digital companding. Companding Both are linear approximations of a logarithmic input/output relationship Both are implemented using 8-bit code words (256 levels, one for each quantization interval). This allows for a bit rate of 64 kbps Both break the dynamic range into 16 segments (8 positive and 8 negative) - each segment is twice the length of the preceding one, and uniform quantization is used within each segment Both use similar encoding techniques for the 8-bit word - the first (most significant bit) identifies polarity, bits 2, 3 and 4 identify the segment, and the last four bits identify the quantization level within the segment Similarities between A-law and µ-law: Different linear approximations lead to different lengths and slopes Numerical assignment of the bit positions in the 8-bit code word to segments and to quantization levels within segments are different A-law provides a greater dynamic range µ-law provides better signal/distortion performance for low level signals A-law requires 13 bits for a uniform PCM equivalent, whereas m-law requires 14 bits International connections should use A-law (µ to A conversion is the responsibility of the µ-law country) Differences between A-law and µ-law: Companding curve Encoding is the fourth step in the PCM process With the quantization (non-linear quantization) the incoming PAM samples are assigned with quantified levels. For transmission, these quantified levels are given a binary code. This process is called encoding. In practical systems, quantizing and encoding are a combined process Encoding P(1 bit) ABC(3 bits) WXYZ(4 bits) Polarity bit „1‟ for +ve „0‟ for –ve Segment code Step number in the segment Encoding Contd…. The MSB indicates the sign of the sample. Next 3 bits indicate one out of eight segment numbers. . Last 4 bits indicate one out of 16 positions in the segment. A voltage 'Vc' will be encoded as 11110101. The quantizing and encoding are done by a circuit called coder. This coder converts PAM signals, into an 8 bit binary code Encoding contd …. Using encoding each sample is assigned with 8 bits. Hence for 8000 samples, the no of bits are 8000 x 8 bits = 64000 bits or 64 Kbits or 64 Kbps. After encoding each analog voice channel (4 KHz) will be converted into64 Kbps digital channel. Encoding Contd…. As per CCITT recommendation each sample is characterized by means of 8 bits. Each voice channel requires a bit rate equal to:8000 samples X 8 bits = 64 Kbps. Time between two samples(Ts) Sample duration (∆t) One bit duration : 125 µs. : 3.91 µs. : 0.488 µs. Sample s Ts=125 µs ∆t Bit duration 0.488µs St t 8 bit word Encoding Contd…. Sample duration 3.91µs TDM is the fifth step in the PCM process. The encoded output of the PCM is 64Kbps, this is the data rate of a single channel. For better utilization of media bandwidth & to have cost effective solution, the number of channels are multiplexed using TDM and the multiplexed output is send on the media as a frame. In TDM multiplexing process the available time period of 125 µs is divided into number of time slots Time Division Multiplexing (TDM) Time slot is nothing but a channel,we can send either voice or data (64Kbps ) on this channel /time slot. In T1 system 24 time slots are multiplexed as a PCM frame In E1 system 32 time slots are multiplexed as a PCM frame After multiplexing this is called PCM-TDM frame or simply PCM frame. Time Division Multiplexing (TDM) Line Coding is the sixth and last step in the PCM process. The multiplexed (PCM-TDM) output, which is in the form of PCM frame, to be inter connected to either VF cable pair or unbalanced wire for further transmission over the medium. On these interconnecting cables the signal is likely to undergo high frequency attenuation, distortion and cross talk. The signal has a strong dc content and thus prevents the use of ac-coupled circuits. For distortion free transmission, the PCM-TDM output should be converted into a suitable code which will match the characteristics of the medium. This coding is called the Line Coding. Line Coding Characteristics of Line Coding The total bandwidth of the signal should be as small as possible The energy in the upper part of the signal spectrum should be low so that the attenuation distortion is low The energy in the in the lower part of the spectrum should also be low to reduce interference from and to VF circuits in the same cable Characteristics of Line Coding No dc component. When the voltage level in a digital signal is constant for a while, the spectrum creates very low frequencies (results of Fourier analysis) These frequencies around zero, called DC components, present problems for a system that cannot pass frequencies below 200Hz. Also a long distance link may use one or more transformers to isolate different parts of the line electrically Hence to over come this problem the line coding should not have any DC components. So that transformers can be used for coupling purposes Characteristics of Line Coding Contain adequate timing information to correctly interpret the signals received from sender. The receiver‟s bit intervals must correspond exactly to the sender‟s bit intervals. If the receiver clock is faster or slower, the bit intervals are not matched and receiver might interpret the signals wrongly Have an in built error monitoring capability Immunity to Noise and Interference Types of Line Codings Non-return-to-zero (NRZ) - Unipolar Return to Zero (RZ) – Unipolar Alternate Mark Inversion (AMI) – Bipolar High Density Bipolar order of 3 (HDB-3) - Bipolar The output of PCM-TDM is in NRZ (Non-Return to Zero) line coded format. This NRZ format cannot be effectively transmitted directly on a transmission line because the signal contains a DC component and lacks timing information. An additional line coding is necessary, which converts this NRZ line code to a pseudo ternary code suitable for transmission. There are different types of additional line coding schemes such as AMI & HDB-3 are used. These additional line coding schemes eliminate the DC component of NRZ code. Line Coding RZ (Return-to-Zero) Line Coding Return-to-zero (RZ) describes a line code, in which the signal drops (returns) to zero between each pulse. This takes place even if a number of consecutive 0's or 1's occur in the signal. The signal is self-clocking, a separate clock does not need to be sent along with the signal. But this line coding requires twice the bandwidth to achieve the same data-rate as compared to non-return-to-zero format. NRZ (Non-Return-to-Zero) Line Coding Non-Return-to-Zero (NRZ) describes a line code, it is a binary code in which one‟s (1's) are represented by a positive voltage. Zero‟s (0's) are represented by a negative voltage), with no other neutral or rest condition. The pulses have more energy than a RZ code. Unlike RZ, NRZ does not have a rest state. NRZ is not inherently a self- synchronizing code This line coding NRZ requires less bandwidth to achieve the same data-rate as compared to return-to-zero format AMI (Alternate Mark Inversion) Code AMI code was first devised by Barker AMI code is often termed as bipolar signal. In this code, successive marks (bit 1‟s) are alternatively of positive and negative polarity and equal in amplitude In this AMI code spaces (bit 0‟s) is of zero amplitude. The disadvantage of the AMI code is the absence of significant timing information for long sequence of zeros The realization of code is also simple. Bipolar violation technique is used to detect errors in the line signal. It is used in 24 channel PCM (T1) system. AMI (Alternate Mark Inversion) Code To overcome the shortcomings of AMI code, HDB-3 code has been devised. It makes a substitution on binary formations containing more than 3 zeros. This substitution must obey the following rules The 4th zero is converted to 1 (mark) with the same polarity as immediately preceding mark, thus violation is introduced. This bit is known as „V‟ (Violation) bit. The „V‟ bit, i.e., placed in place of 4th zero, must be of opposite polarity to the previous „V‟ bit. 1st zero of four consecutive zeros will be made as 'B' bit (Bipolar/ Balance bit) This „B‟ bit takes a value of 1 (B00V) if the number of 1s‟ between two „V‟ bits is even, and takes a value of 0 (000V) if the number of 1s‟ between two „V‟ bits is odd. HDB-3 (High Density Bipolar of Order 3) In the 1st set of four zeros, the first zero bit i.e. „B‟ bit assumes „1‟ (B00V) if the preceding 1s are even or „B‟ bit assumes „0‟ (000V) if the preceding 1s are odd. Every 4th zero is converted to „V‟ bit and assumes same polarity as its proceeding mark. From the 2nd set of four zeros, the first zero bit i.e. „B‟ bit assumes „1‟ (B00V) if the no. of 1s between two „V‟ bits are even and assumes „0‟ if the no. of 1s between two „V‟ bits are odd. „B‟ bit follows AMI and „V‟ bit doesn‟t follow the AMI. As the long sequence of zero is avoided, more timing information is available in the signal. Code violation technique is employed to detect errors. Steps for conversion of a unipolar binary signal into an HDB - 3 code Line Coding Techniques Information can be in the form of two types of signals Voice Data Data Signals are required to be structured into eight bit signals. No need of filtering, sampling, quantizing & encoding Types of information Signals Digital Transmission systems PDH (1975) Plesio-synchronous Digital Hierarchy SDH (1990) Synchronous Digital Hierarchy OTH (2000) Optical Transport Hierarchy Plesio-synchronous Digital Hierarchy Plesiochronous is a Greek word meaning Almost Synchronous, but not fully Synchronous.Each PDH circuit has its own (autonomous)clocks that are nominally of the same frequency but are not locked; resulting an unsynchronized network called Plesiochronous. In PDH technology, ITU-T has recommended two systems under G.702 standard. They are E1 System with 30 Voice channels T1 System with 24 Voice channels In E1 / PDH system the information from source to destination is transmitted in the form of a Frame with 30 channels/32 time slots The duration of the E1 frame is 125µs with 32 time slots The duration of each time slot is 32 / 125µs = 3.9µs Each time slot carries 8 bits, the bit duration 3.9 µs /8 = 488ns Each E1 frame has 32 time slots and each time slot carries 8 bits E1 / PDH System Total number of bits per frame is 32 x 8 = 256 bits These 256 bits are transmitted with in the time period of 125µs. The bit rate or data rate is always mentioned as bits / second (bps) The number of bits sent per second is 256 x 8000 = 2048000 bits/sec or bps = 2048 Kbps = 2.048 Mbps Hence, this 30 channel / 32 time slot PCM / PDH system is popularly known as 2.048 Mbps system / E1 system E1 / PDH System In E1 frame there are 32 time slots are available These time slots are numbered as TS0 to TS31 The TS0 carries the synchronization signal. The TS16 carries the signalling information. TS1 to TS15 carry speech samples of channel 1 to 15. TS17 to TS31 carry speech samples of channels 16 to 30. For data channel,the signaling information is not necessary Data can be carried from TS1 to TS31 (31 channels) E1 Frame encoded voice / data signals encoded voice / data signals Signalling information TS0 TS1 Synchronization Signal TS31 TS16 TS15 TS17 Synchronization in E1 Frame The out put of PCM terminal is continuous stream of bits At the receive end, the receiver has to discriminate between frames and channels So, it has to recognize the start of each frame correctly This operation is called frame alignment or synchronization and achieved with the help of a fixed digital pattern called Frame Alignment word (FAW) The FAW is inserted into the transmitted bit stream at regular intervals The receiver looks for FAW and once detected, it knows that the next time slot contains the information for channel 1 followed by 2 and so on The signaling information is transmitted in the form of DC pulses The signaling levels retain their constant amplitudes for much longer periods than the speech The signalling is slow varying component compared to the speech signal. Therefore, a signalling can be digitized with lesser number of bits. Only 4 bits are enough for representing signalling information Signalling in E1 Frame Each speech channel / time slot should also have its corresponding signaling channel / time slot. Signaling channel requires only 4 bits and it doesn‟t requires all the 8 bits available in time slot. In each frame time slot no. 16 is used for sending the signaling information pertaining to two voice channels. To send the signaling information pertaining to all 30 voice channels, you require to send 15 frames. One extra frame is required to accommodate the information pertaining to these frames, hence a total of 16 frames are send, called as multi frame. Signaling in E1 Frame In E1 / PDH system the information from source to destination is transmitted in the form of multi frame Each multi frame is composed of 16 frames. The no. of bits in each multi frame are 16 x 256 = 4096 bits The duration of a multi-frame is16 x 125µs = 2000µs or 2ms. These 16 frames are numbered as F0 to F15 Multi frame in E1 System Each frame is having 32 time slots numbered as TS0 to TS31 The TS0 of F0 carries the synchronization information called as Frame Alignment Word (FAW) The TS16 of F0 carries the Multi Frame Alignment Word (MFAW) The TS1 to TS15 & TS17 to TS31of F0 will carry 1st samples of voice / data pertaining to CH1 to CH30 The TS0 of F1 carries supervisory & alarm signals or NFAW The TS16 of F1 carries the signalling information pertaining to Channel no.1 & Channel no.16 (Ch N & Ch N+15) Multi frame in E1 System The TS1 to TS15 & TS17 to TS31 of F1 will carry 2nd samples of voice / data pertaining to CH1 to CH30 The TS0 of F2 carries Frame Alignment Word (FAW) The TS16 of F2 carries the signaling information pertaining to Channel no.2 & Channel no.17(Ch N & Ch N+15) The TS1 to TS15 & TS17 to TS31of F2 will carry 3rd samples of voice / data pertaining to CH1 to CH30 TS0 of all even frames carries Frame Alignment Word (FAW) TS0 of all odd frames carries supervisory & alarm signals or NFAW Multi frame in E1 System TS0 TS1 TS2 TS16 TS30 TS31 TS0 TS1 TS2 TS16 TS30 TS31 TS0 TS1 TS2 TS16 TS30 TS31 F-0 F-1 F-2 TS0 TS1 TS2 TS16 TS30 TS31 F-15 . . . . . . . Multi frame Structure TS17 TS17 TS17 TS17 TS15 TS15 TS15 TS15 Frame Alignment word (FAW) FAW is transmitted in the TS0 of all even frames This FAW will have 8 bits General convention is that if bit value is 1, it is an alarming condition & if we are not using any bits , these bit value goes to „1‟. but if bit value is 0, it is un alarming condition & if we are using any bit, these bit value goes to „0‟. Frame Alignment word (FAW) X 0 0 1 1 0 1 1 The FAW bit values are always fixed, they are as The 1st bit (B1) „X‟ is reserved for international use and it is normally set to 1, because this PDH mux is not globally compatible After considering the 1st bit (B1) value as „1‟, the FAW becomes 1 0 0 1 1 0 1 1 X 1 A Sa4 Sa5 Sa6 Sa7 Sa8 Supervisory & Alarm signals or NFAW is transmitted in the TS0 of all odd frames This Supervisory & Alarm signals or NFAW will have 8 bits To distinguish between the TS0 of frames carrying supervisory & alarm signals or NFAW , from those carrying FAW, the 2nd bit (B2) value is fixed as „1‟, 1st bit (B1) : „X‟ reserved for international use. It is normally set to 1 2nd bit (B2) : is set to 1 to prevent simulation of the FAW 3rd bit (B3) : „A‟ shows the remote alarm indication 4th to 8th bits (B4 to B8): „Sa4 to Sa8‟ are additional spare bits Supervisory & Alarm Signals or NFAW Supervisory & Alarm Signals or NFAW 1 1 0 0 1 1 1 1 1 1 1 0 1 1 1 1 4th to 8th bits (B4 to B8) or „Sa4 to Sa8‟ : these bits are additional spare bits, can be used in specific point to point applications within national borders. When these bits are not used, these bits value should be set to 1 Generally 4th bit (B4) or „sa4‟is used for NMS purpose, this NMS bit is used for operations, maintenance and performance monitoring, this 4th bit value becomes „0‟ When there is no alarm, the NFAW bit value is When there is an alarm is generated, the NFAW bit value is Multi Frame Alignment word (MFAW) 0 0 0 0 X Y X X MFAW is transmitted in the TS16 of F0 This MFAW will have 8 bits, Out of this 8 bits, first 4 bits will carry MFAW & next 4 bits will carry NMFAW. MFAW NMFAW 1st to 4th bits (B1 to B4) :„MFAW , the bit values are fixed & they are normally set to „0‟ 5th to 8th bits (B5 to B8) :„NMFAW , the bits of 5th, 7th & 8th are reserved ,represented as „X‟ and these bits value are normally set to „1‟ 6th bit (B6) : used for indicating distant multi frame alarm, represented as „Y‟ and this 6th bit value will be „0‟ if there is no any alarm and if there is an alarm, Multi Frame Alignment word (MFAW) The bit values of MFAW ( i.e. first 4 bits) is always fixed as „0 0 0 0‟ The bit values of NMFAW (i.e.next 4 bits) only will change, when there is no any alarm & no fiber cut the MFAW & NMFAW bit values are when there is Remote multi frame alarm (RMA) is generated due to fiber cut, the MFAW & NMFAW bit values are 0 0 0 0 1 0 1 1 0 0 0 0 1 1 1 1 PDH multi frame, frame, time slot & bit representation 2.048 mbps/E1 frame (summary) Basic Binary rate Line coding : 2048kbps ±50 ppm : HDB3 Nominal amplitude : 2.37V(for co-axial cable) Impedance Frame length Available bits/slot Multiplexing type Frame Rate : 3.00V (for balanced cable) : 75Ώ (for coaxial cable) : 120Ώ (for balanced cable) : 256 bits : 8 bits : Byte Interleaving : 8000 frames/sec 2Mbps frame is the most commonly used basic frame All the European networks support this type of frame. ITU-T Standards G.703 G.704 G.7 11 G.7 12 G.714 G.713 G.732 G.735 G.823 : Digital interfaces : Basic frame structure : PCM coding law : Characteristics of a speech channel 4-wire interface : Separate characteristics of a 4-wire interface of the transmit and receive directions : Characteristics of a speech channel 2-wire interface : PCM multiplex equipment : PCM multiplex equipment with a facility for a synchronous data interface : Jitters and Wanders Primary MUX Equipment Chapter 2 Primary MUX Equipment The 30 channel PCM mux equipment has been designed to convert speech, signaling and data information at the transmit end into a digital output bit stream of 2048 Kbps. At the receiving end all the original information will be extracted by proper De multiplexing operations from the incoming digital bit stream. This system provides the local /trunk exchanges with various signaling capabilities for different types of exchange equipment The performance of 30 channel PCM multiplexing equipment confirms to the ITU (T) Recommendations G 703, G 711, G 712 and G 732. Nowadays, all Primary MUXes are being used as Programmable Drop-Insert MUXes only. The same drop-insert can be configured as terminal mux by disabling one of the aggregate 2048 Kbps links. This terminal is generally used at Head Quarter station and at last terminal station. Primary MUX Equipment Terminal Multiplexer A terminal multiplexer multiplexes all the 30 Voice / Data circuits into a standard PCM signal of 2.048 Mbps Terminal multiplexer interfaces one direction for transmission and reception. This type of multiplexing system is used at the end stations or Head quarter stations. MUX 2.048 Mbps Internal bus User Interfaces Terminal Multiplexer Drop-Insert Multiplexer A drop-Insert multiplexer multiplexes all the 30 voice/data circuits into two standard PCM signals of 2.048 Mbps Drop-insert interfaces two directions for transmission and reception. This type of multiplexing system is used at the intermediate stations or way stations. MUX 2.048 Mbps 2.048 Mbps Aggregate Aggregate 30 analog or digital or a combination of both channels Drop-Insert Multiplexer User Interfaces Internal bus Drop-Insert MUX has two aggregate 2048 kbps links. Each link has transmit and receive paths. The 30 channels on the channel side can be mapped to either of the two aggregate links. Mapping of channels from one aggregate link to the other aggregate link is possible. These mapping functions are otherwise known as “Cross Connections”. Drop-Insert Multiplexer PDH HIERARCHY Chapter 3 The first digital multiplexingsystems were introduced at the beginning of the 1970s. The introduction of digital exchanges for 64 Kbps channels increased the pressure to bunch together great numbers of channels for digital transmissions. Three international multiplex hierarchies arose. The bit rates for these hierarchies were standardized gradually. Digital Multiplexing PDH Hierarchy In PDH, there are three different hierarchy systems are existing over the globe. They are Japanese PDH System European PDH System North American PDH System These hierarchy systems are meant for accommodating more number of voice and data channels for the users. 2048 kbit/s 64 kbit/s x 4 x 30/31 x 24 x 3 x 7 x 5 x 3 Japan USA Europe primary rate 2. order 3. 4. 5. 32064 kbit/s x 3 97728 kbit/s 397200 kbit/s x 4 139264 kbit/s x 4 564992 kbit/s x 4 34368 kbit/s x 4 8448 kbit/s 44736 kbit/s 274176 kbit/s x 6 1544 kbit/s 6312 kbit/s x 4 PDH Systems Worldwide PDH Hierarchy In PDH at each hierarchical level, the tributaries are not clocked by the standard reference clock. These PDH systems are clocked by their own internal clock, hence PDH is not fully synchronous, it is plesiochronous. The lower level tributaries with variation in clock are multiplexed to form digital stream of next hierarchical level. PDH streams are E1 2.048 Mbps+/- 50ppm E2 8.448 Mbps+/- 30ppm E3 34.368 Mbps+/- 20ppm E4 139.264 Mbps+/- 15ppm ITU-T recommended two PDH two systems under G.702 Based on the different first level of hierarchy bit rate they are called E1 system or T1 system In E1 system the first level is 2048 Kbps, In T1 system the first level is 1544 Kbps The Internationally agreed maximum level is 4 for international interconnections Levels higher than 4th level are not mentioned in the recommendation. PDH Hierarchy Synchronous Digital Hierarchy (SDH) In SDH at each hierarchical level, synchronous transport module is formed with information pay load and overhead bits and a synchronizing mechanism is in-built with a standard reference master clock. In this SDH hierarchy the data rate of next stage is exact multiple of previous stage data rate. Generally SDH transmission is used on OFC links and in a very limited way on digital Radios Optical Transport Hierarchy (OTH) In OTH, optical data units and optical transport units are formed as data frames These data frames are transported on different wavelength of the Wave Division Multiplexing (WDM) or Wave length Division Multiplexing on optical fiber. Nowadays still more no . of wavelengths are multiplexed together called as Dense Wave length Division Multiplexing (DWDM) and data frames are transported on optical fiber. Higher order PCM systems are designed for the trunk network, by assembling primary blocks of 30 channels of 2.048 M b/s in a hierarchical fashion similar to analogue groups, subgroups and super groups of FDM. India adopts European system basing on first level bit stream of 2048 Kbps , which can go up to fifth level bit stream of 564992 Kbps & 7680 speech channels. As per the ITU-T recommendations under G.702, the fifth level of hierarchy is not standardized Digital hierarchy recommended by ITU-T under G.702 is up to fourth level of bit stream of 139268 Kbps & 1920 channels is standardized. Higher order PCM Systems used in INDIA Higher order PCM Systems used in INDIA From other 1st order Mux From other 2nd order Mux From other 3rd order Mux PDH multiplexing from 2nd order onwards involves two basic operations irrespective of hierarchical level.They are Bit interleaving Justification A digital multiplexer can be considered as parallel to serial converter A digital multiplexer accepts a set of inputs (tributaries) applied in parallel and interfaces the inputs in to a single output signal having specific time intervals allocated to each message serially Basics of PDH Multiplexing The multiplexing of severaltributaries can be achieved by either bit by bit multiplexing (bit interleaving) or word by word multiplexing (byte interleaving) In 30 channel PCM, the signal E1 is formed by byte interleaving. But in higher order multiplexing, i.e. forming E2 out of 4E1s or E3 out of 4E2s or E4 out of 4E3s, multiplexed signal is formed by bit-interleaving. In bit-interleaved multiplexing, one bit is taken at a time from each tributary to produce a multiplexed signal. Interleaving There are four bit streams to be multiplexed. One bit is sequentially taken from each tributary so that the resulting multiplexed bit stream has every fifth bit coming from the same tributary. Four incoming tributaries are shown in fig. (a) and multiplexed signal formed by bit-interleaving is shown in fig. (b) fig. (a) fig. (b) Bit Interleaving Bit interleaving In Byte interleaving, one byte (8 bits) is taken sequentially taken from each time slot, so that the resulting multiplexed stream has every thirty three byte coming from the same time slot Byte interleaving sets some restraints on the frame structure of the tributaries and require great amount of memory capacity. Bit interleaving is much simpler because it is independent of frame structure and also requires less memory capacity. Byte Interleaving Byte Interleaving Byte by Byte or Word by Word MULTIPLEXING Justification This process is to enable the multiplexer and de-multiplexer to maintain correct operation. In PDH every tributary has its own clock & every tributary is timed with plesiochronous frequency This plesiochronous frequency is a nominal frequency and there is always a variation of frequency . For example, the primary multiplexer (E1) output is 2.048 Mbps +/- 50ppm. To account for this small variations of the tributary frequencies when multiplexing to the next hierarchy level, a process known as Justification is used. Justification is of two types Positive Justification Negative Justification In PDH we use only positive justification, no negative justification Positive justification or Pulse stuffing Positive justification or Pulse stuffing involves intentionally making the output bit rate of a channel higher than the input rate. The output channel therefore contains all the input data plus a variable number of “stuffed bits‟ that are not part of the incoming subscriber information. The stuffed bits are inserted at the specific locations, to pad the input bit stream to the higher output bit rate. This stuffed bits must be identified at the receiving end so that “de-stuffing” can be done to recover the original bit stream. Justification In positive justification or stuffing there are two things are involved. Justification opportunity bits (R bits) These bits are nothing but stuffing bits. These bits are available as extra bits that can be used when the rate of the incoming tributaries is higher than its nominal value. These bits are at Tx side. Justification control bits (J bits) In order for the device that receives the multiplexed signal to be able to determine whether a justification opportunity bit or stuffing bit contains useful information. These bits are at Rx side Plesiochronous Multiplexing Bit Stuffing In PDH hierarchy, level-1 / E1 / 2 Mbps uses certain frame structure and it uses Byte interleaving. At higher order levels also the frame begins with Frame Alignment Word (FAW), with the difference that, at these levels, multiplexing is carried out by bit interleaving. E1 follows byte interleaving and all other higher order levels E2, E3 & E4 follows bit interleaving, thus making it impossible to identify the lower level frames inside a higher level frame. Recovering the tributary frames requires the signal to be de- multiplexed In the higher order tributaries the transmission rate is more than 4 times that of lower order, to leave room for the recovery of justification, FAW & Alarm bits, after de-multiplexing. PDH, higher hierarchical levels PDH, higher hierarchical levels Start with Frame Alignment Word (FAW) . Multiplexing is carried out bit by bit . The higher hierarchical levels are obtained by multiplexing 4 lower level frames . Nominal transmission rate is more than 4 times that of the lower level. Provision for over head bits, in order to leave room for the permitted variations in rate (justification bits), FAW, alarm and spare bits. De-multiplexing for recovering the tributary frames 2nd order MUX – 8 Mbps 2nd order digital multiplex and higher order multiplex equipments usually working on a non synchronous mode even though the tributary signals may be constrained to be within the same timing tolerance limits and operate at the same nominal bit rate in the plesiochronous net work. 2.048 Mbps 8.448 Mbps Output 2.048 Mbps 2nd ORDER MUX 2.048 Mbps 2.048 Mbps F A Country code Justification Control bits Justification bits 100.4μ seconds 212bits 212bits Set-1 Set-2 212bits Set-3 212bits Set-4 10 bits AL M 1 1 200bits Inform. 4 208bits Inform. 4 208bits Inform. 4 4 204bits Inform. Frame Structure of 2nd order MUX - 8.448 Mbps One frame of 848 bits is divided into 4 sets and the frame duration is 100.4μ seconds. Stuffing rate is chosen as 64 Kbps per 30 Channel block. 64 Kbps are added on to the primary bit stream by the multiplier for justification purposes. Total no of stuffing bits in 120 Channel Mux system is 4x64 = 256 Kbps. Frame Structure of 2nd order MUX - 8.448 Mbps Frame Structure of 2nd order MUX - 8.448 Mbps Hence the clock for this system is = 4 (2048 Kbps + 64 Kbps ) = (8192 Kbps+256 Kbps) = 8448 Kbps. Number of frames for a duration of one second = 8448 Kbps/848 = 9962 frames/seconds. Master FAW is 1111010000. Justification bit = one per tributary. Justification control bits = equal number for each tributary. 8448Kbps 2112 Kbps 2112 Kbps 2112 Kbps 2112 Kbps 2048 Kbps 2048 Kbps 2048 Kbps 2048 Kbps +/-102 Hz Asynchron ous PDH Inputs Synchronous Intermediate Inputs HigherOrder PDHOutput MUX Positive Justification of 2nd order MUX - 8.448 Mbps 2nd order MUX – 8 Mbps Nominal bit rate Tolerance Line code Frame length Frame rate Bits per TI Multiplexing method Nominal justification ratio : 8448 Kbps :30 ppm : HDB3 : 848 bits : 9962.264 frames/s : 206 bits : Bit-by-bit : 0.424 2nd order MUX – 8 Mbps 2nd order MUX – 8 Mbps 3rd order MUX – 34 Mbps Nominal bit rate Tolerance Line code Frame length Frame rate Bits per TI Multiplexing method Nominal justification ratio : 34368 Kbps : 20 ppm : HDB3 : 15368 bits : 22375 frames/s : 378 bits : Bit-by-bit : 0.436 3rd order MUX – 34 Mbps PDH Higher order level characteristics Jitter & Wander in PDH Networks Chapter 4 In any digital communication system error free transmission & avoiding cumulative noise-induced degradation is desirable. But in reality this is not possible due to mis-timing inside transmission equipment when data is regenerated. When mis-timing becomes large, errors are produced and the system can become unusable, even at low values of mis-timing sensitivity to amplitude and phase variations is increased and performance suffers. Jitter & Wander in PDH Networks Mis-timingmay be referred to as skew, wander or jitter depending on its frequency band Mis-timing may be the result of pattern dependency or due to noise sources such as thermal noise or crosstalk Mis-timing can also be inherent in the system design and caused by de-multiplexing (justification) in PDH systems or pointer movements in SDH systems Every PDH system will generate some degree of mis- timing and it is not possible to remove it completely. Jitter & Wander in PDH Networks Jitter & Wander in PDH Networks Jitter and wander are defined respectively as the short term and long term variations of the significant instant of a digital signal from their ideal positions in time The Significant instant may be taken as the midpoint or any fixed arbitrary point, which is clearly identifiable on each of the pulse. Jitter is an unwanted variation of one or more characteristics of a periodic signal. Jitter may be seen in characteristics such as the interval between successive pulses, or the amplitude, frequency, or phase of successive cycles Pictorial Representation Of Jitter And Its Effect On Digital Signal Jitter effect on digital signal Jitter is represented as a continuous time function with properties independent of the digital signal, which it affects. Jitter considered to be most significant occupies the frequency range from a few tens of Hz to several KHz. The unit of jitter is unit interval UI As per the ITU-T recommendations G.701, the UI is the nominal difference in time between the consecutive significant instants of an isochronous signal. Jitter effect on digital signal What is jitter? Jitter free clock (ideal) jittered clock phase- deviation time What is wander? amplitude / dB 10 Hz w a n d e r r a n g e MHz frequency j i t t e r r a n g e Hz What is wander? Wander is also called as low frequency jitter Like jitter it can also endanger the error free transmission, because it has the property to accumulate in networks to higher levels Accumulation of wander is higher than the accumulation of jitter (PLL circuits). The more slower a phase variation is the harder it is to detect. Jitter-reducing circuits are included in today's network elements, but they don‟t work very well with slow wanders. Extreme Exactly synchronization signals like PRC are necessary to detect a wander. Which problems do jittered signals cause in networks? misinterpretation of information data bits 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 sampling point of time Jittered signals cause misinterpretation of information in digital networks. If the sampling point of time runs out of the maximal tolerable value, the bits will be misinterpreted either by sampling one bit twice (7,8) or by leaving one bit out (10,11). The consequence can be a immediate loss of the synchronization of all following lower multiplex levels and therefore a complete failure of the following transmission network. As long as the deviation don‟t trespass the critical level, mistakes do not occur. The higher the transmission rate is the higher is the jitter- sensitivity of a transmission system. Therefore higher quality of the transport signal is required. Which problems do jittered signals cause in networks? Jitter is characterized by two main values: Amplitude: deflection of signal edge deviation(“how far”) Frequency: frequency of signal edge deviation (“how fast”) The jitter unit of measuring the deviation of the signal edge is UI (unit interval). The unit interval is a relative measurement unit referring to the length of a single bit and is therefore independent of signal type and bit rate. This fact is very important to make signals from different hierarchies comparable. Unit of Jitter (UI) For understanding the unit of jitter (UI), let us consider The instantaneous jitter amplitude is 1 µs In a 100 KHz square wave The period of frequency = 1 / 100 KHz = 10 µs. For a timing signal to differentiate between what is mark (bit „1‟) and space (bit „0‟) , the Unit Interval between the significant instants = 5 µs Jitter amplitude = 1µs /5 µs = 0.2 UI Unit of Jitter (UI) Very low frequency jitter: Inherent instabilities of clock sources. Noise induced jitter: Phase noise in crystal controlled oscillator circuits used in clocks through out the system. Noise in logic circuits: Variations in the propagation delays: Slowly changing temperature delays: Sources of the jitter in transmission network Mapping Jitter caused by justification processes. Insertion and removal of justification bits and framing digits. Jitter on the regenerated bit streams:Inter symbol interference Regenerator Jitter: Imperfect timing recovery at the regenerators. Pointer Jitter caused by pointer actions. Jitter gain caused by accumulation of Jitter. Stuffing and waiting time Jitter caused by stuffing techniques. Sources of the jitter in transmission network Thank you